The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 16, 2000

Filed:

Dec. 18, 1997
Applicant:
Inventors:

Yuesong He, San Jose, CA (US);

Kent Kuohua Chang, Cupertino, CA (US);

John Jianshi Wang, San Jose, CA (US);

Assignee:

Advanced Micro Devices, Inc., Sunnyvale, CA (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
H01L / ;
U.S. Cl.
CPC ...
438264 ; 438304 ; 438596 ;
Abstract

A layer of polysilicon is deposited over an oxide layer on top of a silicon substrate, with core field oxide and active regions, and patterned. An oxide mask is then added. Next, the oxide mask and the layer of polysilicon are removed from above the core field oxide regions. Next, a second layer of polysilicon is deposited and etched to form polysilicon spacers. Later, an ONO dielectric, a third polysilicon layer, a tungsten silicide layer, and SiON layers are successively formed and patterned. The polysilicon spacers effectively seal any recesses that may occur in the edges of the first polysilicon layer to prevent harboring of subsequently added polysilicon material. Accordingly, NAND-type flash memory core cells cannot be electrically shorted by polysilicon material, so called 'polystringers', present in such recesses.


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