The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 16, 2000
Filed:
Jun. 08, 1998
Kevin Joseph Hawes, Greentown, IN (US);
Sean Michael Kelly, Williamsville, NY (US);
David Jay Vess, Kokomo, IN (US);
Delco Electronics Corporation, Kokomo, IN (US);
Abstract
An improved interconnect apparatus for high power circuits that is low in cost and amenable for integration with low power circuits in a single electronic package. The interconnect apparatus includes serially connected surface mount bus bars bridging two or more metal pads or traces formed on a standard circuit board of the type used to package low power circuitry. The surface mount bus bars operate not only to conduct the higher currents, but also to draw heat out of the metal pads or intervening portions of the metal traces. This keeps the temperature within the capabilities of low power circuit board technology, and allows very narrow high power interconnects for reduced package size. Manufacturing cost advantages are achieved because the surface mount bus bars are assembled by automated pick-and-place equipment of the same type used for other surface mount components used in the package. In certain circumstances, a series of surface mount bus bars may be placed atop a continuous metal trace, or overlapped to provide a minimum resistance connection.