The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 09, 2000

Filed:

Jul. 03, 1997
Applicant:
Inventors:

Sharad Mehrotra, Austin, TX (US);

Jagannathan Narasimhan, Millwood, NY (US);

Albert Emil Ruehli, Chappaqua, NY (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
39550007 ; 39550003 ; 39550009 ;
Abstract

An apparatus and method is presented for capacitance analysis in chip environments for arbitrary geometries. It uses a process which combines 2-dimensional ascertainments where the length is chosen to fit the solution. Also, the required accuracy may be limited to be within an error range. The technique is also applicable for the analysis of three dimensional capacitances, and importantly also for a mixture of two and three dimensional capacitance ascertainments. In an embodiment the process divides the space into a set of subspaces. The capacitance value for the subspaces are determined using the parallel plate capacitance formula.


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