The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
May. 09, 2000
Filed:
Feb. 18, 1998
Applicant:
Inventors:
Assignee:
Kabushiki Kaisha Toshiba, Kanagawa-ken, JP;
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
327551 ; 327311 ; 361 17 ;
Abstract
An input buffer circuit is connected to a first power supply voltage pad for applying a first power supply voltage, and a first ground line. An internal circuit larger in power consumption than the input buffer circuit is connected to a second power supply voltage pad for applying a second power supply voltage, and a second ground line. The parasitic resistance of the first ground line is higher than that of the second ground line. By connecting a capacitance between a power supply line connected to the first power supply voltage pad, and the first ground line, fluctuations in first power supply voltage are suppressed to prevent the input buffer circuit from malfunctioning.