C-dump switched reluctance hysteresis control

Abstract

A circuit and method for controlling a switched reluctance motor are provided. The circuit includes a phase coil and a switch that controls a current in the phase coil responsive to a hysteresis control signal. The circuit also includes a current sensor that measures the level of current in the phase coil and a comparator that compares the measured current level to a predetermined upper hysteresis current level. The circuit further includes a hysteresis control signal generating circuit that generates the hysteresis control signal responsive to the comparison signal and a timing signal that comprises a series of timing pulses. The hysteresis control signal assumes a first logic level whenever the measured level of current in the phase coil exceeds the predetermined upper hysteresis current level, thereby opening the switch and allowing current to dissipate from the phase coil. The control signal subsequently assumes a second logic level on the rising edge of the next timing pulse in the timing signal, thereby closing the switch and allowing the level of current in the phase coil to increase.