The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
May. 02, 2000

Filed:

May. 20, 1998
Applicant:
Inventors:

Dave M Singhal, San Jose, CA (US);

Chester F Bassetti, Danville, CA (US);

Assignee:

NeoMagic Corp., Santa Clara, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G09G / ;
U.S. Cl.
CPC ...
345-3 ; 345 87 ; 345 89 ;
Abstract

The amount of time that a row of pixels in a flat-panel display is illuminated is modulated from frame-to-frame and from row-to-row. Pixels in rows that are on for a longer period of time appear brighter than pixels in rows that are on for shorter periods of time. Such line modulation is combined with frame-rate-cycling (FRC) to dramatically increase the number of gray scales that can be generated for any given number of frames in a FRC cycle, and with phase-offsetting to keep the frame period constant and to reduce flicker. An N-frame FRC cycle that previously generated N+1 gray scales now produces a full 2.sup.N gray scales. The total pixel-on time over the N frame cycle depends not just on how many frames the pixel is on, but on which frames the pixel is on. Since each row in each frame in the FRC cycle is on for a different amount of time, aliasing of the frames is greatly lessened or no longer occurs. A line modulation buffer and speeding up the pixel clock to the panel allow for greater modulation.


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