The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 25, 2000
Filed:
Oct. 02, 1998
Reading Maley, San Francisco, CA (US);
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Abstract
A level shifter interfaces a digital system having devices designed for low operating voltages to an external system having higher operating voltages. The level shifter is comprised of two level shifting stages. Each level shifting stage includes a pull-up stack of a plurality of pull-up devices, coupled between a high power supply and a coupling node, which turn on when the coupling node is driven to a high shifted voltage, which is substantially the voltage at the high power supply, and which turn off when the coupling node is driven to a low shifted voltage, which is substantially the voltage at a low power supply. Each level shifting stage further includes a pull-down stack of a plurality of pull-down devices, coupled between the low power supply and the coupling node, which turn on when the coupling node is driven to the low shifted voltage and which turn off when the coupling node is driven to the high shifted voltage. Each level shifting stage further includes a clamping circuit, coupled to the coupling node and to a predetermined node of the plurality of pull-up and pull-down devices, for limiting voltage across terminals of each of the plurality of pull-up and pull-down devices by discharging down the predetermined node when the coupling node is driven to the low shifted voltage and by charging up the predetermined node when the coupling node is driven to the high shifted voltage. Thus, the level shifter shifts a lower core voltage range from the digital system to a higher shifted voltage range of the external system while limiting voltage across terminals of devices within the level shifter to prevent device breakdown and degradation.