The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 25, 2000
Filed:
Jan. 09, 1998
David W Stoenner, Fuquay-Varina, NC (US);
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Abstract
An input/output (I/O) buffer is presented which selectively provides resistive termination for a transmission line coupled to an input/output node. The I/O buffer includes the input/output node, a first output driver stage, a second output driver stage, a differential amplifier, and an input termination stage. The first output driver stage is enabled when resistive termination of the transmission line is not required (e.g., when an older bus standard is to be supported). The second output driver stage is enabled when resistive termination of the transmission line is required (e.g., when a higher performance bus is to be supported). The differential amplifier produces a logic high input signal when a voltage driven upon the input/output node by the transmission line is greater than a reference voltage, and produces a logic low input signal at the output terminal when the voltage driven upon the input/output node by the transmission line is less than the reference voltage. In one embodiment, the input termination stage includes a termination node, a resistive element coupled between the input/output node and the termination node, and a time delay unit. The time delay unit receives the input signal produced by the differential amplifier and produces a time-delayed input signal after a predetermined time delay has elapsed. The termination node is selectively coupled to either the power supply potential or the ground potential dependent upon the time-delayed input signal produced by the time delay unit.