The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 25, 2000
Filed:
Mar. 06, 1998
Young Kwon Jun, Seoul, KR;
Yoo Chan Jeon, Seoul, KR;
LG Semicon Co., Ltd., Chungcheongbuk-do, KR;
Abstract
The DRAM cell includes a first transistor, a second transistor, and a capacitor. The first and second transistors each have a gate, a source, and a drain electrode. The gate electrode of the second transistor is connected to one of the source and drain electrodes of the first transistor, and a first electrode of the capacitor is connected to the gate electrode of the second transistor. Also, a second electrode of the capacitor is connected to one of the source and drain electrodes of the second transistor. One of the source and drain electrodes of the second transistor not connected to the second electrode of the capacitor is connected to the gate electrode of the second transistor. Accordingly, the second transistor is on when a logic value of '1' is stored in the gate thereof, and off when a logic value of `0` is stored in the gate thereof. A wordline is connected to the gate electrode of the first transistor, a bitline is connected to the one of the source and drain electrodes of the first transistor not connected to the gate of the second transistor, and a reading line is connected to the second electrode of the capacitor. By applying a voltage corresponding to a logic value to the bitline, and selectively turning on the writing wordline, the logic value on the bitline is stored in the gate electrode of the second transistor. During a reading operation, a reference voltage is applied to the bitline, and a reading voltage is applied to the reading wordline. Then, the first transistor is selectively turned on by applying a voltage to the writing wordline. Based on the fluctuation in the reference voltage applied to the bitline, the logic value stored in the gate of the second transistor is easily determined.