The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 18, 2000
Filed:
Aug. 26, 1998
Jin Pyo Kim, Dejon-Shi, KR;
Joong Bae Kim, Dejon-Shi, KR;
Yong Yeon Kim, Dejon-Shi, KR;
Suk Han Yoon, Dejon-Shi, KR;
Abstract
The present invention relates to the fast destaging method using a parity engine, and more particularly to the fast destaging method for constituting and administering the cache of disk array in order to minimize lowering of write performance which occurs in high-speed disk array controller using VRAM parity engine. According to the invention, the disk cache is composed of the read cache, the write cache and the destaging cache. The write caching is processed as being divided into the write cache and the destaging cache. The destaging cache, which has just one more block for mid parity to its data block, uses less memory and enables the write cache to be allocated with more blocks, and thereby it can improve hit ratio of cache. Write requests are first stored on the write cache, and if the write cache is full, they move blocks that would be least used thereafter into the destaging cache. Once destaging is requested, it is practicable with one parity calculation and two write operations by selecting blocks that is least recently used. Also in destaging, block parity calculation can increase its speed and relieve the processor burden by using a VRAM based parity engine which has its dual ports.