The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 18, 2000
Filed:
May. 14, 1998
Vishal Anand, Fremont, CA (US);
VLSI Technology, Inc., San Jose, CA (US);
Abstract
A centrally controlled interface scheme for promoting design reusable circuit blocks. A system in accordance with the present invention enables existing circuit blocks of a computer system to be connected in a wide variety of shared bus standards while their internal circuitry remains unchanged. Specifically, within an embodiment of the present invention, the sharing of signals over a shared bus scheme is exclusively controlled by external bus control circuits which are controlled by an external control unit. As such, the circuit blocks are designed to operate as if they have dedicated (e.g., point-to-point) lines to the other circuit blocks with which they communicate. By implementing the circuit blocks and external control of the shared signals in this fashion, the bus interconnection scheme of the circuit blocks can be changed to fit desired performance levels or expected traffic levels, while the circuit blocks themselves remain unchanged. Consequently, little or no time is required redesigning existing circuit blocks when bus modifications are implemented within future computer systems which still utilize the existing circuit blocks. Instead, only modifications are required to the external circuitry which controls the shared signals of the circuit blocks, which is substantially easier than redesigning existing circuit blocks.