The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 18, 2000

Filed:

Jul. 28, 1998
Applicant:
Inventor:

Jin-seok Kwak, Kyungki-do, KR;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365201 ; 36523006 ;
Abstract

Integrated circuit memory devices having merged data test capability include first and second memory cell arrays in first and second blocks of memory, respectively, a first global input/output line and switches for enabling transfer of data from the first memory cell array to the first global input/output line in response to a first merged data test control signal P1 and enabling transfer of data from the second memory cell array to the first global input/output line in response to a second merged data test control signal P2. A highly integrated merged data test circuit is also provided with test cells therein and each test cell is capable of testing multiple memory cell arrays in at least two blocks of memory. A first merged data test circuit is provided which has a first input electrically coupled to the first global input/output line and a first output which generates first and second error signals upon detection of a failure in the first and second memory cell arrays, respectively.


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