The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 18, 2000

Filed:

Apr. 21, 1998
Applicant:
Inventor:

Jack-Lian Kuo, Tainan, TW;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03L / ;
U.S. Cl.
CPC ...
327333 ; 331 57 ; 327166 ; 327176 ; 327299 ;
Abstract

An apparatus having an input node and an output node for generating a timing signal. The apparatus includes an enabling circuit, one or more inverters, and one or more capacitive elements. The enabling circuit generates a signal of a first state when one or both of the input node and the output node are of a second state, and generates a signal of the second state when both of the input node and the output node are of the first state. The first state and the second state represent two opposite logic states. The inverters generate opposite state outputs in responsive with their inputs. The inverters are connected in series with a first inverter being responsive to the enabling circuit and a last inverter for generating a signal for the output node. The capacitive elements are connected between a voltage source and one of the inputs of the inverters.


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