The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Apr. 18, 2000
Filed:
May. 27, 1998
Ronald F Talaga, Jr, Austin, TX (US);
Russell Hershbarger, Nevada City, CA (US);
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Abstract
The present disclosure encompasses the use of a current mirror to control the trip point for a power-on-reset circuit. The current mirror is designed to turn on at a multiple of a transistor threshold voltage V.sub.t. The power-on-reset circuit asserts a power-on signal in response to mirror current provided by the current mirror when the supply voltage ramps up above the V.sub.t multiple. Since the transistor threshold voltage may be tightly controlled during the fabrication process, the trip point for the power-on-reset circuit may be precisely and accurately adjusted to match the minimum operating supply voltage level specified for an integrated circuit device such as a microprocessor. Also, a feedback path may be provided in the power-on-reset circuit to turn off the current mirror once the power-on signal is asserted so that there is no current draw in the power-on-circuit for static conditions. The lack of current draw at static power conditions prevents unnecessary power consumption and false stuck-at faults during I.sub.ddq testing.