The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 11, 2000

Filed:

Dec. 14, 1998
Applicant:
Inventors:

Dimitris C Pantelakis, Austin, TX (US);

Wai T Lau, Austin, TX (US);

Assignee:

Motorola, Inc., Schaumburg, IL (US);

Attorneys:
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
36523003 ; 365207 ; 365208 ;
Abstract

A memory device (50) contains a first array of memory (12) and a second array of memory (14). The arrays (12 and 14) are coupled to four segmented current data buses (iGDLs) (16, 18, 20, and 22). When in a x36 word mode of operation, the current data buses (16, 18, 20, and 22) are wired to communicate directly with output buffers (56-59) through several current-to-voltage converters (24-31). When in a x18 word mode of operation, the current data buses (16, 18, 20, and 22) are wired to communicate through the converts (24-31), through a voltage bus (52 and 54, see also FIG. 3), to the output buffers (56-59). The change in wiring for x36 word mode versus x18 word mode is done either by a top-level metal option in fabrication or by user software programming whereby the device (50) is easily wired into one of two configurations while maintaining an advantageous speed/power product.


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