Interleaved sense amplifier with a single-sided precharge device

Abstract

An interleaved sense amplifier with a single sided precharge device which provides simplification of the conventional sense amplifier circuitry, as well as a reduction in the area occupied by the sense amplifier circuitry, thereby resulting in chip size reduction. A precharge device is placed on only one side of the sense amplifier, which is used to charge both sets of bit lines pairs that are coupled to the sense amplifier to a common voltage during an equalization/precharge operation. In addition, the resistance of the transistors comprising the precharge device is increased such that the precharge transistors can be further utilized for limiting the flow of current between the bit line pair and precharge net, which obviates the need for the additional leakage limiter devices in the conventional sense amplifier arrangement. Thus, a compact and simplified sense amplifier architecture is realized.