The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 11, 2000

Filed:

Oct. 15, 1997
Applicant:
Inventors:

Barry K Britton, Orefield, PA (US);

Ian L McEwen, Golden, CO (US);

Ho T Nguyen, Allentown, PA (US);

Satwant Singh, Macungie, PA (US);

Carolyn W Spivak, Emmaus, PA (US);

Richard G Stuby, Jr, New Tripoli, PA (US);

Assignee:

Lucent Technologies Inc., Murray Hill, NJ (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01L / ; H03K / ; H03K / ;
U.S. Cl.
CPC ...
326 41 ; 326 38 ;
Abstract

A programmable logic device, such as an FPGA, is implemented using logic cells that have configurable connection schemes between routing resources and logic element input pins. For example, in one embodiment, each logic cell in the device has a flexible input structure that supports two or more different connection schemes, which may or may not involve input sharing, where each logic cell can be individually programmed for any of the available connection schemes when the device is configured. As such, the device can be efficiently programmed to implement the user's specific circuitry. The invention balances the competing goals of (1) reducing routing requirements by limiting the number of connections between routing resources and logic element input pins and (2) providing minimally constrained programming of logic elements.


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