The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 11, 2000

Filed:

Dec. 30, 1997
Applicant:
Inventor:

Gary R Lawman, San Jose, CA (US);

Assignee:

Xilinx, Inc, San Jose, CA (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
326 38 ; 326 39 ;
Abstract

An FPGA includes an embedded non-volatile memory coupled to a configuration access port. The configuration access port allows the non-volatile memory to program the configuration memory of the FPGA. On power-on or reset, the non-volatile memory configures a first portion of the FPGA using configuration data stored in the non-volatile memory. Other portions of the FPGA can also be configured using the embedded non-volatile memory. Alternatively, an external configuration device can configure the other portions of the FPGA through a configuration port. Further, either the embedded non-volatile memory or the external configuration device can reconfigure the first portion of the FPGA.


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