Semiconductor device including protective circuit with guard ring

Abstract

A semiconductor device includes a protection circuit and a guard ring. The guard ring is formed between a MOS transistor of a semiconductor substrate and internal circuits, to cut off a leak current from the MOS transistor to the internal circuits. The guard ring includes a well region and a pair of heavily doped impurity regions for med spaced apart from each other on the surface of the well region. The pair of doped regions have mutually different conductivity types and have substantially equal voltages applied to have potentials with respect to the source of the MOS transistor. There are formed a first parasitic transistor having one heavily doped impurity region as the collector, the semiconductor substrate as the base, and the drain of the MOS transistor as the emitter, the one heavily doped impurity region being identical in conductivity type with the well region; and a second parasitic transistor having the other heavily doped impurity region as the emitter, the well region as the base, and the semiconductor substrate as the collector. When the first parasitic transistor conducts, the second parasitic transistor conducts, which turns off the first parasitic transistor. Thus, the leak current is prevented from flowing from the MOS transistor through the first parasitic transistor to the internal circuits.