The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Apr. 04, 2000

Filed:

Feb. 26, 1998
Applicant:
Inventors:

Tetsuya Ishii, Aichi, JP;

Hiroshi Katagiri, Aichi, JP;

Tadashi Shingaki, Mie, JP;

Tatsuya Takemura, Gifu, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H05K / ; H03H / ;
U.S. Cl.
CPC ...
174255 ; 174260 ; 333175 ; 333185 ; 333219 ;
Abstract

A multilayer microelectronic circuit to be directly mounted on a substrate and to be used, for example, as a resonator. The multilayer microelectronic circuit comprises a plurality of dielectric layers and patterned electrodes which are laminated one upon another to form a laminated structure, the dielectric layers and the patterned electrodes forming an electrical circuit. The laminated structure has side surfaces extending along a direction in which the dielectric layers and the patterned electrodes are laminated. An input line is formed at one of the side surfaces and connected with an input section of the electrical circuit. An output line is formed at one of the side surfaces and connected with an output section of the electrical circuit. A grounding line is formed at one of the side surfaces and connected with a grounding section of the electrical circuit. Additionally, a signal line formed at one of the side surfaces, for connecting sections of the electrical circuit. The signal line has an end positioned adjacent a mounting surface at which the multilayer microelectronic circuit is directly mounted on the substrate, in which the end of the signal line is separate from the mounting surface so as to be insulated from electrical contact with the substrate.


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