The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 28, 2000
Filed:
Nov. 12, 1997
Vishal Anand, Fremont, CA (US);
VLSI Technology, Inc., San Jose, CA (US);
Abstract
A method and system for latching an address for accessing a synchronous static random access memory (SRAM). A first address status signal of the SRAM is driven active, triggering an SRAM to latch the address on an address bus coupled therewith. A second address status signal is received when a valid address is placed on the address bus. In response, the first address status signal is driven inactive. This forces the last address latched by the SRAM to be the one indicated by the second address status signal. Then, a determination is made as to whether SRAM access is required based on the address placed on the bus. SRAM access may not be required if the current cycle is either non-cacheable or a miss in the SRAM. When SRAM access is not required, the first address status signal is driven active. In the alternative, when SRAM access is required, the first address status signal is maintained inactive. The first address status signal is maintained inactive until the SRAM is ready to accept a second address.