The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 28, 2000
Filed:
May. 12, 1998
Wong Hee, San Jose, CA (US);
Abhijit Phanse, Santa Clara, CA (US);
National Semiconductor Corporation, Santa Clara, CA (US);
Abstract
A distributive encoder for receiving and processing digital error signals representing variations in peak values of an equalized incoming digital data signal and in accordance therewith encoding error signals which represent signal peak errors in data signals for purposes of identifying erroneous signal baseline, peak and equalization conditions. The digital error signals represent variations in peak values of an equalized incoming digital data signal which includes a data signal baseline intermediate to its positive and negative peaks. Two sets of the digital error signals identify when present positive and negative levels transcend prior positive and negative levels, respectively, of the equalized incoming digital data signal. Using various subsets of these digital error signals, the distributive encoder generates encoded error signals which identify erroneous signal baseline, peak and equalization conditions. Using various ones of these encoded error signals, a baseline control circuit can generate a baseline control signal for use in controlling a correction of the equalized incoming digital data signal baseline, a peak control circuit can generate a peak control signal for use in controlling compensation for the positive and negative peaks of the equalized incoming digital data signal, and an equalization control circuit can generate a set of equalization control signals for use in controlling the equalization of the incoming digital data signal.