The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 28, 2000

Filed:

Feb. 11, 1999
Applicant:
Inventors:

Takatsugu Kurata, Ibaraki, JP;

Kiyoshi Hamada, Sakai, JP;

Makoto Kawachi, Ibaraki, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03K / ;
U.S. Cl.
CPC ...
307109 ; 327111 ; 345211 ;
Abstract

A driving circuit for a capacitive load includes an amplifier for applying voltage with large amplitude to the capacitive load in order to reduce the power consumption of the amplifier is disclosed. The driving circuit for the capacitive load applies the voltages Vout, Vout' amplified by a first amplifier and a second amplifier Q.sub.2, Q.sub.3, Q.sub.2 ', Q.sub.3 ' to a first capacitive load C, and a second capacitive load C'. The applied voltages Vout and Vout' have the opposite phase to each other. The driving circuit for the capacitive load includes a first emitter follower circuit Q.sub.1 and a second emitter follower circuit Q.sub.1 ' for converting the supplied voltage Vcc from the power supply source of the driving circuit to the voltage which is higher by predetermined voltages E.sub.1, E.sub.1 ' than the output voltage Vout, Vout' of the first amplifier and the second amplifier respectively. The driving circuit for the capacitive load includes a switching part using diodes D.sub.1 and D.sub.2 (D.sub.1 ' and D.sub.2 ') for switching automatically to connect the power supply terminal of the first amplifier (second amplifier) with either the output of the emitter follower circuit Q.sub.1 (Q.sub.1 ') or the second capacitive load C (the first capacitive load C').


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