The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 21, 2000

Filed:

Aug. 07, 1998
Applicant:
Inventors:

Feng Chen, Bethlehem, PA (US);

Ravi K Kolagotla, Lansdale, PA (US);

Le T Ly, Allentown, PA (US);

Jiancheng Mo, Allentown, PA (US);

Hosahalli R Srinivas, Allentown, PA (US);

Assignee:

Lucent Technologies, Inc., Murray Hill, NJ (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
713400 ;
Abstract

A flag generating circuit that uses a feedback mechanism to set or reset a flag associated with two systems with asynchronous clocks is provided. Upon receipt of a set flag (or reset flag) signal, the circuit immediately isolates the signal after setting (or resetting) the flag to prevent race conditions between the systems. The clock associated with the setting system is synchronously started when waiting to set the flag and synchronously stopped when waiting for the flag to be reset. The clock associated with the resetting system is synchronously started when waiting to reset the flag and synchronously stopped when waiting for the flag to be set. Accordingly, the flag generating circuit provides a race free and technology independent flag generating circuit capable of setting and resetting flags associated with asynchronous


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