The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 21, 2000

Filed:

Jun. 26, 1992
Applicant:
Inventors:

Gerald George Pechanek, Endwell, NY (US);

Stamatis Vassiliadis, Vestal, NY (US);

Jose Guadalupe Delgado-Frias, Endwell, NY (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
712 11 ; 345505 ;
Abstract

A massively parallel diagonal-fold mesh array processor provides a triangular diagonally folded mesh computer with the same functionality as a square mesh computer but with half the number of connection wires. The diagonal-fold mesh array processor is modified in this invention to provide a more general purpose processor node and to enhance the connectivity between the processing nodes while still providing the image processing and finite difference capabilities of the original structure. By repeatedly folding the triangular diagonal-fold array structure, processing elements are placed together which, with additional connections, allows the improvement in connectivity. This enhancement would be difficult to achieve in a standard mesh organization. The resultant folded structure maintains the functionality of the original mesh while expanding its capabilities. A bitonic sort example is presented which demonstrates the utility of the enhanced connectivity. The multiple folded array concept is applied to a six neighborhood hexagonal array demonstrating the general nature of the concept.


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