The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 21, 2000
Filed:
Sep. 30, 1998
Steven J Zika, Fremont, CA (US);
C Bradford Hopper, San Francisco, CA (US);
Advanced Micro Devices, Inc., Sunnyvale, CA (US);
Abstract
A method and apparatus for detecting random layout structures sensitive to process induced pattern errors in semiconductor device manufacturing applies a first manufacturing process to a first wafer containing semiconductor devices. A second manufacturing process is applied to a second wafer containing semiconductor devices. The second manufacturing process is similar to, but different from the first manufacturing process. The first and second wafers are compared by image subtraction to detect systematic pattern defects in the semiconductor devices of one of the first and second wafers. After differences are detected, the layout is examined to determine whether the difference represents a defect. If so, the design rules of the layout can be changed to accommodate a wider process variation and improve processing yield.