The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 21, 2000
Filed:
Mar. 18, 1998
Paul F Ferguson, Jr, N. Andover, MA (US);
James Wilson, Sharon, MA (US);
Analog Devices, Inc., Norwood, MA (US);
Abstract
A sigma-delta analog-to-digital converter includes an integrator having an input and an output and an integrator capacitor connected between the input and output. A switched-capacitor input circuit includes at least one input capacitor, an input sampling switching circuit and an input delivery switching circuit. The input sampling switching circuit includes at least one input sampling switch operable to connect the input capacitor to be charged by an input voltage at a sampling rate. The input delivery switching circuit includes at least one input delivery switch operable to connect the input capacitor to transfer charge to the integrator capacitor at a first transfer rate. A switched-capacitor feedback circuit is connected in a feedback path between the input and output of the integrator. The feedback circuit includes at least one feedback capacitor, a feedback sampling switching circuit and a feedback delivery switching circuit. The feedback sampling switching circuit includes at least one feedback sampling switch operable to connect the feedback capacitor to be charged by a feedback reference voltage at the sampling rate. The feedback delivery switching circuit includes at least one feedback delivery switch operable to connect the feedback capacitor to transfer charge to the integrator capacitor at a second transfer rate. The second transfer rate is a predetermined factor greater than the first transfer rate such that the sampled feedback reference voltage charge is transferred to the integrator capacitor at a greater rate than the transfer of the sampled input voltage charge to prevent modulator instability due to an input overload condition.