The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 14, 2000
Filed:
May. 06, 1998
Hiroshi Yamazaki, Tokyo, JP;
Manabu Koarai, Tokyo, JP;
Naonobu Fujiwara, Tokyo, JP;
Toshikazu Morisawa, Tokorozawa, JP;
Kabushiki Kaisha Toshiba, Kawasaki, JP;
Abstract
In an initialization operation of a system, an I/O trap SMI is issued to a CPU, and CPU state map information is stored in a predetermined area in an SM-RAM. When an interrupt control process occurs during the activation of an OS, the CPU state map information formed in the initialization operation is set in the CPU, and the CPU operation mode is changed to an original mode in which interrupts from various I/O devices are enabled. In the original mode of the CPU, parallel processing using an interrupt is executed. Initialization commands are sequentially issued to a plurality of devices such as a KBC, an HDD, and a display controller. The KBC, the HDD, and the display controller generate command completion interrupt signals upon completion of the command processes for their initialization operations. Next commands are sequentially issued to devices which have generated the command completion interrupt signals. A plurality of devices are initialized in accordance with the command completion interrupt signals from these devices.