The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Mar. 14, 2000

Filed:

Apr. 23, 1998
Applicant:
Inventor:

Isao Naritake, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365221 ; 3652385 ;
Abstract

A semiconductor dynamic random access memory device serially reads out data bits from and serially writes data bits into memory cells through a long burst cycle, and the data bits are transferred between a read/write data bus to data latch circuits, between the data latch circuits and the main/sub sense amplifiers and the main/sub sense amplifiers and the sub-bit line pairs; while the data bits are being stepwise transferred between the memory cells and the read/write data bus, an internal timing controller not only provides activation timings and deactivation timings to the main-sub sense amplifiers and transfer gate arrays but also the starting point and the end point of the long burst cycle so that the semiconductor dynamic random access memory device is fabricated on a relatively small semiconductor chip.


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