The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 14, 2000
Filed:
Dec. 17, 1998
Jeffrey E Koelling, Dallas, TX (US);
Yung-che Shih, Plano, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
The present invention includes a circuit for detecting voltage levels in an integrated circuit including a first reference voltage(324), a first differential amplifier(349) having an inverting input terminal connected to the first reference voltage, a non-inverting input terminal and an output terminal, a first transistor (356) having a control terminal connected to the output terminal of the first differential amplifier, having a first current handling terminal connected to a voltage supply terminal and having a second current handling terminal connected to the non-inverting input terminal of the first differential amplifier, a first load (358) device having a first terminal connected to the second current handling terminal of the first transistor and a second terminal, a second load device (360) having a first terminal connected to the second of the first load device and a second terminal connected to a second reference potential, a second differential amplifier (391) having an inverting input terminal, a non-inverting input terminal in connected to the first terminal of the second load device and having an output terminal, the output terminal providing voltage detection output signal, a second transistor (382) having a control terminal connected to the output terminal of the first differential amplifier, having a first current handling terminal connected to the voltage supply terminal and having a second current handling terminal connected to the inverting input terminal of the second differential amplifier, a third load device (386, 384) having a first terminal connected to the inverting input terminal of the second differential amplifier and having a second terminal connected to the point at which a voltage level is to be detected. This provides a highly stable voltage detection system.