The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Mar. 07, 2000
Filed:
Nov. 06, 1997
Tachio Yuasa, Kawasaki, JP;
Fujitsu Limited, Kawasaki, JP;
Abstract
A stabilized current mirror circuit including a current mirror circuit 10 having an input-stage nMOS transistor 11 and an output-stage nMOS transistor 12, an error amplifier 30 in which an output current I3 decreases in response to the rise of an output potential V2 of the output-stage nMOS transistor 12 above a specified value, a current mirror circuit 20 having an input-stage pMOS transistor 22 through which the current I3 flows and an output-stage pMOS transistor 21 connected in series to the output-stage nMOS transistor 12 and an nMOS transistor 42 connected between the output-stage pMOS transistor 21 and the output-stage nMOS transistor 12. An nMOS transistor 41 connected at a current input provides a bias voltage to the gate of the nMOS transistor 42 to enable the nMOS transistor 42 to function as a norator.