The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 29, 2000
Filed:
Nov. 07, 1997
Srinivas Ramamurthy, San Jose, CA (US);
Jinglun Tam, San Jose, CA (US);
Geoffrey S Gongwer, Campbell, CA (US);
James Fahey, Aix En Provence, FR;
Atmel Corporation, San Jose, CA (US);
Abstract
Boundary Scan integrated circuits are provided with a plurality of new registers between two dedicated pins, Test Data In (TDI) and Test Data Out (TDO) pins. The new registers include an address register and a plurality of test data registers which are addressable by the address register using address-dependent instructions in the instruction register (IR). Instructions for the addressable registers may be steered to the correct register with an ADDLOAD instruction placed in the instruction register followed by an address-dependent instruction. The ADDLOAD instruction makes the address register active between the TDI and TDO pins. Any instruction from a set of address-dependent instructions may be steered to any register handling address-dependent instructions allowing a small number of instructions to be used in a large number of addressable data registers. At the same time non-addressable registers, such as the Boundary Scan register, use address-independent instructions.