The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 29, 2000
Filed:
Dec. 18, 1996
Jonathan H Shiell, Plano, TX (US);
Ashwini K Nanda, Yorktown Heights, NY (US);
Ian Chen, Houston, TX (US);
Steven D Krueger, Dallas, TX (US);
Texas Instruments Incorporated, Dallas, TX (US);
Abstract
A microprocessor-based system (2) is disclosed, based on an x86-architecture microprocessor (5). The system includes a memory address space (30) and a input/output address space (40), where input/output operations are performed in an I/O mapped manner. According to a first embodiment of the invention, burstable access is performed to areas of the main memory (32) which are blocked from cache access, by the microprocessor (5) asserting the cache request signal (CACHE#) in combination with the control signal (M/IO#) indicating that an I/O operation is requested. The memory controller (10) interprets this combination as a burst request to the non-cacheable memory location (32), indicates the grant of burst access by asserting the cache acknowledge control signal (KEN#), and the burst memory access is then effected. According to a second embodiment of the invention, burst access to non-cacheable memory space (32) is acknowledged by the memory controller (60) by way of a burst acknowledge signal (BEN#) that is separate from the cache acknowledgment signal (KEN#).