The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 29, 2000
Filed:
Dec. 08, 1998
Applicant:
Inventors:
Assignee:
Fujitsu Limited, Kanagawa, JP;
Primary Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
365233 ; 36523008 ;
Abstract
A semiconductor integrated circuit is adapted to make invalid an external clock, externally supplied to the semiconductor integrated circuit, when the semiconductor integrated circuit is set in an active power-down state. The semiconductor integrated circuit includes a delay locked loop DLL circuit which outputs an internal clock which phase is synchronized to the external clock. A latch circuit retains control signals in synchronism with the internal clock output by the DLL circuit. An internal circuit performs a predetermined process based on the control signals supplied from the latch circuit.