The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 29, 2000
Filed:
Jun. 11, 1998
Angelo Genova, Delia, IT;
Mario Tarantola, Bareggio, IT;
Giuseppe Cantone, Siracusa, IT;
Roberto Gariboldi, Lacchiarella, IT;
STMicroelectronics S.r.l., Agrate Brianza, IT;
Abstract
A circuit for charging a capacitance using an LDMOS integrated transistor controlled in a manner to emulate a high voltage charging diode of the capacitance. The circuit avoids the switch-on of parasitic bipolar transistors of the LDMOS structure during transient states. The circuit includes a number of junctions directly biased between a source node and a body node of the LDMOS transistor, a current generator referred to a ground of the circuit, at least one switch between the source and a first junction of a chain of directly biased junctions, and a limiting resistor connected between the body and the current generator referred to ground. The switch is open during a charging phase of the capacitance and is closed when the charging voltage of the capacitance exceeds a preestablished threshold responsive to a control signal. The switch is controlled by a logic signal active during the phase in which the supply voltage of the integrated circuit is lower than the minimum switch-on voltage of the same integrated circuit, for charging the body with a current whose maximum value is limited to a preestablished value.