Asynchronous registers with embedded acknowledge collection

Abstract

An asynchronous register with embedded acknowledge collection is disclosed. The asynchronous register includes a data threshold circuit for generating data or NULL values at an output signal line based upon an evaluation of at least one data input value and an acknowledgment collection circuit, embedded in the data threshold circuit, for collecting a plurality of acknowledge signals and resolving the acknowledge signals for controlling, in combination with the at least one data input value, the passing of the data or NULL values to the output signal line. The acknowledgment collection circuit includes an M of N acknowledge collection circuit, wherein N is an integer representing the number of acknowledge signals being resolved and M representing a threshold, wherein M.ltoreq.N. The M of N acknowledge collection circuit allows the data input values to pass as data to the output signal line after M acknowledge signals assert a request for data and allows the data input values to pass as NULL to the output signal line after P acknowledge signals assert a request for NULL, wherein P.ltoreq.N. P may or may not be equal to M. A reset network is provided for providing system initialization at registration boundaries and is made transparent during normal operating conditions.