The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 29, 2000

Filed:

Jan. 23, 1998
Applicant:
Inventor:

Edison T Hudson, Chapel Hill, NC (US);

Assignee:

Zevatech, Inc., Morrisville, NC (US);

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01N / ; G01B / ;
U.S. Cl.
CPC ...
250548 ; 356400 ;
Abstract

The present invention provides for the accurate placement of an object having a surface pattern by relating the perimeter of the object to the surface pattern, such as a circuit pattern of a semiconductor die. This includes illuminating the object at its front and rear faces and viewing the object with a machine vision system. Front-side illumination of the surface pattern enables the machine vision system to obtain an image of the actual position of the circuit pattern or other pattern of interest on the front of the component. Rear illumination provides a silhouette of the perimeter edges of the component enabling the machine vision system to obtain the actual position of the perimeter edges of the component. A corrective offset from a normative feature location, such as the centroid defined by the perimeter edges of the component, is then calculated. The machine vision system is coupled to a conventional automatic component placement system that uses an in-flight perimeter registration and orientation system. The corrective offset from the machine vision system is used to adjust the position calculated by the conventional perimeter registration system to precisely place the component with respect to features of interest on the component, such as the center of the circuit pattern, rather than the mere outline of the component.


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