The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 29, 2000

Filed:

Jul. 17, 1997
Applicant:
Inventor:

Katsuhiko Inada, Himeji, JP;

Assignee:

Kabushiki Kaisha Toshiba, Kawasaki, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H01J / ;
U.S. Cl.
CPC ...
445 24 ; 445 23 ;
Abstract

A method of manufacturing an array substrate for a display device having a surface area including a display area having a plurality of pixel electrode arranged on a main surface of an insulating substrate, a peripheral area positioned at the outside of the display area to supply a drive voltage to the display area, and a mark area positioned at the outside of the peripheral area, including the steps of forming a first layer on a main surface of the insulating substrate, forming a resist on the first layer, and patterning the first layer by exposing the resist using a plurality of mask patterns which correspond to each area obtained by dividing of the surface area, wherein adjacent divided areas of the first substrate area and the second substrate area are patterned with a common mask having two mask patterns each used in each of the first substrate area and the second substrate area of each area obtained by dividing of the surface area. According to the present invention, in spite of using the highly accurate exposure technique, increases in manufacturing time and cost can be restrained in manufacturing the array substrate for the display device.


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