The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 22, 2000
Filed:
Oct. 15, 1997
Lucian R Albu, New York, NY (US);
Barry K Britton, Orefield, PA (US);
Wai-Bor Leung, Wescosville, PA (US);
Richard G Stuby, Jr, New Tripoli, PA (US);
James A Thompson, Schnecksville, PA (US);
Zeljko Zilic, Allentown, PA (US);
Lucent Technologies Inc., Murray Hill, NJ (US);
Abstract
A programmable logic device (PLD), such as a field programmable gate array (FPGA), has a programmable clock manager (PCM) that converts an input clock into at least two different output clocks having different clock rates. The different output clocks can be used to control different processes either within or outside the FPGA. For example, one output clock can be used to control the FPGA's input/output registers, while a second, faster output clock can be used to control the FPGA's internal registers.