The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 22, 2000
Filed:
Jul. 24, 1997
Applicant:
Inventors:
William B Andrews, Long Pond, PA (US);
James F Hoff, Bethlehem, PA (US);
Satwant Singh, Macungie, PA (US);
Assignee:
Lucent Technologies Inc., Murray Hill, NJ (US);
Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
H03K / ; H01L / ; G06F / ;
U.S. Cl.
CPC ...
326 41 ; 326 39 ; 326 44 ; 326 37 ;
Abstract
A field-programmable gate array (FPGA) having at least one programmable cell (e.g., an input/output (I/O) cell) having an output node circuit (e.g., a pad circuit) in which the output data signal and the tri-state signal are applied to a multiplexer that drives the tri-state port of an output buffer in the output node circuit. This configuration enables the output node circuit to be configured for open drain drive mode operations in a fast, predictable manner that does not need to rely on the FPGA's general routing resources.