The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 22, 2000
Filed:
Feb. 10, 1998
William J Parrish, Santa Barbara, CA (US);
James T Woolaway, Goleta, CA (US);
Indigo Systems Corporation, Santa Barbara, CA (US);
Abstract
Correction for temperature-induced non-uniformities in the response characteristics of the microbolometers in an infrared focal plane array (FPA) is performed by applying a non-uniform corrective bias to the individual microbolometers. The corrective bias is applied either before or during the bias or integration period during which the detectors are sampled. The bias-correction can be applied to two-dimensional detector multiplexers at each column amplifier input, the reference potential for each column amplifier or the voltage supply for each detector element. The magnitude of each corrective bias is determined by calibrating the detectors at different temperatures and different levels of incident infrared radiation. According to another aspect of this invention, a microbolometer which is thermally-shorted to the substrate on which the read out integrated circuit (ROIC) is formed is used along with the sensing microbolometer to compensate for variations in temperature. In some embodiments, an adjustable voltage is applied to the thermally-shorted microbolometer to provide an offset correction. Circuitry for providing on-ROIC substrate temperature control is also described. This invention allows the operation of a microbolometer FPA over a wider range of device substrate temperatures and thereby significantly reduces the complexity and cost of the system as compared with the conventional technique of cooling the FPA.