The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 15, 2000
Filed:
Nov. 26, 1997
Michael J Sabin, Sunnyvale, CA (US);
Mark W Heising, Palo Alto, CA (US);
Atmel Corporation, San Jose, CA (US);
Abstract
A system and method for performing multiplication and modular reduction of large integers. The system includes at least one large integer unit, each large integer unit having a multiplier, an adder, and a register. First and second multiplier inputs are applied to the multiplier, and first and second adder inputs are applied to the adder. One output of the multiplier is also applied to the adder. A plurality of large integer units may be connected into a large integer unit array that includes a complementing gate and a latching register. A second output of the multiplier is applied to the first adder input of a next large integer unit, with processing speed increasing as additional large integer units are added to the array.