The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 15, 2000
Filed:
Aug. 30, 1996
Warren S Tustin, Colorado Springs, CO (US);
Matthew S Holcomb, Colorado Springs, CO (US);
Hewlett Packard Company, Palo Alto, CA (US);
Abstract
A self-framing serial trigger within an oscilloscope or specialized analyzer construes an absence of the data's clock signal for at least a selected length of time as implying the occurrence of a framing signal. This frees the serial trigger from otherwise needing an externally supplied framing signal. The serial trigger may include a shift register containing the most recent N-bits of the data, which is then bit-wise compared to the trigger pattern (stored in a register). This level of comparison may provide for don't care bits in the trigger pattern. The results of this bit-wise comparison are then inspected for a certain uniformity indicating that the trigger pattern has been matched. An additional circuit may count clock signals since the last implied framing pulse. If this additional count has not yet reached M (or counted down from M to zero) the match is premature, and no trigger signal is generated. The implied framing signal itself may be generated by loading a down counter with a preselected value each time a selected edge occurs in the clock for the data. The down counter is clocked by a high speed clock running several times faster than the clock for the data. If the down counter ever reaches zero a framing pulse is implied. The implied framing pulse may be generated by decoding a value of zero in the down counter.