The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 15, 2000

Filed:

Mar. 31, 1999
Applicant:
Inventors:

Hideo Yoshida, Saitama, JP;

Yasuhiro Miwa, Saitama, JP;

Assignee:
Attorney:
Primary Examiner:
Int. Cl.
CPC ...
G03B / ;
U.S. Cl.
CPC ...
396106 ; 396 98 ; 396120 ; 396125 ;
Abstract

A far-side signal (I.sub.2) output from a PSD which has received reflected light from an object to be subjected to distance measurement is input to a clamp circuit through a second signal processing circuit, and the far-side signal (I.sub.2) or a clamp signal (Ic) at a predetermined level, i.e., a signal (I.sub.2 c) at a higher level is output from the clamp circuit. An arithmetic circuit and an integration circuit receive a near-side signal (I.sub.1) output from the PSD and the signal (I.sub.2 c) output from the clamp circuit and calculate an output ratio signal (I.sub.1 /(I.sub.1 +I.sub.2 c)). A CPU obtains a distance signal from the output ratio signal in accordance with a transformation formula which changes depending on the threshold value for determining whether to clamp the signal.


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