The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 15, 2000

Filed:

Jun. 26, 1998
Applicant:
Inventor:

Tsuyoshi Hirakawa, Tokyo, JP;

Assignee:

NEC Corporation, Tokyo, JP;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G11C / ;
U.S. Cl.
CPC ...
36518503 ; 36518524 ;
Abstract

A non-volatile multi-level semiconductor storage device having a memory cell that stores m or more bits (m>2) of data and is responsive to n different levels (n>4) of threshold voltage during a write operation. The different thresholds may be achieved by raising and/or lowering the voltage. In order to permit compatibility with a binary collation judgment in overwriting, the cell is operative, when a write data '1' is to be written in the memory cell, such that when a k bit of m bits (1.ltoreq.k.ltoreq.m) in a pre-write data has a '0', the write data is converted into data '0'. The conversion may be accomplished by using a write data '1' and an output signal of a sense amplifier.


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