The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 15, 2000

Filed:

Oct. 08, 1997
Applicant:
Inventors:

Paul M-Bhor Chiang, Cupertino, CA (US);

Chia-Jen Chang, San Jose, CA (US);

Hung-Mao Lin, San Jose, CA (US);

Rita Au Hsu, San Jose, CA (US);

Assignee:

Silicon Magic Corporation, Santa Clara, CA (US);

Attorney:
Primary Examiner:
Int. Cl.
CPC ...
H03M / ;
U.S. Cl.
CPC ...
327589 ;
Abstract

Aspects for self bootstrapping word-line driver circuitry are provided. In a circuit aspect, a word-line driver circuit for a memory cell in a semiconductor memory includes a signal input means, the signal input means comprising a first plurality of transistors, the first plurality of transistors receiving an input voltage signal higher than a voltage supply signal of the semiconductor memory. The circuit further includes a signal output means, the signal output means comprising a second plurality of transistors coupled to the first plurality of transistors and providing an output drive signal sufficient for the memory cell. In a method aspect, a method for providing proper voltage level output of a word-line driver circuit for a semiconductor memory includes forming a self-bootstrap circuit as the word-line driver circuit and providing an input voltage signal to the self-bootstrap circuit, the input voltage signal acting as a source voltage for the circuit and being higher by a predetermined value than a supply voltage of the semiconductor memory.


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