The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.
The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.
Patent No.:
Date of Patent:
Feb. 15, 2000
Filed:
Mar. 17, 1999
Kyuichi Takimoto, Kasugai, JP;
Toshiyuki Matsuyama, Kasugai, JP;
Fujitsu Limited, Kawasaki, JP;
Abstract
A DC--DC converter includes an offset comparator that compares an output voltage with a reference voltage in parallel with an error amplification circuit, which also compares the output voltage with the reference voltage. The offset comparator has a predetermined offset voltage set between its input terminals so that the offset comparator outputs a high signal when the voltage difference between its inputs exceeds the predetermined level. The output of the offset comparator is input, along with the error amplification circuit output, into a PWM comparator. The signal output by the offset voltage comparator allows the DC--DC converter to more quickly respond to a sudden increase in current consumption by a connected load. In responding to the increased current draw, the DC--DC converter quickly converges back at the reference voltage, such that the DC--DC converter provides a very stable output voltage.