The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 01, 2000

Filed:

Nov. 27, 1996
Applicant:
Inventors:

George McNeil Lattimore, Austin, TX (US);

Robert Paul Masleid, Austin, TX (US);

John Stephen Muhich, Austin, TX (US);

Attorneys:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G01R / ;
U.S. Cl.
CPC ...
714710 ; 365201 ;
Abstract

One or more redundant sub-arrays (324) are added to a memory (316-322) of a data processing system (300) to allow a manufacturer to compensate for defects introduced during the fabrication phase of a semiconductor device upon which it is implemented. Each of these redundant sub-arrays includes a separate and independent wordline decoder (202), bitline decoder (206), and input/output circuit (208). Furthermore, the memory to which the redundant sub-array is added is typically an on-chip memory which is organized into bit-slice sub-arrays. The bit-slice organization of the memory allows the redundant sub-array to be chained together with the on-chip memory. Data-in/data-out multiplexers are used to steer bit-slices of the data around the defective sub-arrays.


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Lattimore, George. (2000). Data processing system having memory sub-array redundancy and method (U.S. Patent No. 6021512). U.S. Patent and Trademark Office. https://idiyas.com/patent/badge/6021512

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