The patent badge is an abbreviated version of the USPTO patent document. The patent badge does contain a link to the full patent document.

The patent badge is an abbreviated version of the USPTO patent document. The patent badge covers the following: Patent number, Date patent was issued, Date patent was filed, Title of the patent, Applicant, Inventor, Assignee, Attorney firm, Primary examiner, Assistant examiner, CPCs, and Abstract. The patent badge does contain a link to the full patent document (in Adobe Acrobat format, aka pdf). To download or print any patent click here.

Date of Patent:
Feb. 01, 2000

Filed:

Mar. 17, 1998
Applicant:
Inventors:

Etai Adar, Kiryat Motzkin, IL;

Ophir Nadir, Haifa, IL;

Yehuda Peled, Bet-Sharim, IL;

Attorney:
Primary Examiner:
Assistant Examiner:
Int. Cl.
CPC ...
G06F / ;
U.S. Cl.
CPC ...
712 29 ; 712 28 ; 712 31 ; 712 33 ; 712 37 ; 712 38 ; 712 40 ; 710 62 ; 710101 ; 710107 ; 710129 ; 710250 ; 710262 ;
Abstract

To improve the efficiency of delayed transactions in bus-to-bus bridge systems which include at least one interface to a PCI bus, a bridge system is disclosed including at least a primary interface and an interface to a secondary subsystem for interconnecting a primary PCI bus system and the secondary subsystem. The system comprises a delayed transaction mechanism for enabling a transaction source attached to the primary PCI bus system to effect delayed transactions with a target in the secondary subsystem. This system has a programmable delay transaction timer which provides a degree of flexibility in the configuration of PCI systems. This flexibility can be exploited to provide considerable efficiency gains, albeit at the expense of some deviation of the strict requirements of the PCI Specification.


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