Data processing apparatus and method for controlling access to a memory

Abstract

A data processing apparatus and method for controlling access to a memory having a plurality of memory locations for storing data values, each memory location having a corresponding address. The apparatus includes address range storage for storing information identifying address ranges for a plurality of logical regions within said memory, and attribute storage for storing, for each logical region, attributes used to control access to memory locations within said logical region. In accordance with preferred embodiments, one or more of these logical regions may overlap with one another. Further, address comparator logic is provided for comparing an address issued by a processor corresponding to one of said memory locations with the address ranges for said plurality of logical regions, and, if one or more of the logical regions contains said address, for generating a signal indicating those logical regions containing said address. Attribute determination logic, responsive to the signal generated by the address comparator logic, is then used to apply predetermined priority criteria to determine which logical region containing said address has the highest priority, whereby the attributes in the attribute storage corresponding to that highest priority region are used for controlling access to the memory location specified by the address.